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As power engineers, you are always challenged, challenged with improving power density and efficiency of your design, and taking it beyond what you have done in the past. Hello, I'm Masoud Beheshti, with Texas Instruments GaN business unit. Hi, and I'm Alberto Doronzo, GaN systems and application engineer. So to meet challenges of designing modern power supplies, TI has power solution based on GaN. These offer three ways that can revolutionize your design. That's great, Alberto. And as you know, silicon MOSFET has been around for a long time. So what are some of the key characteristics of GaN that makes it exciting and as we talk about density and efficiency in these designs. So yes, there are three very nice characteristics that GaN has. So the first one is that GaN, for the same surface area or active area of a silicon MOSFET, has about half the RDSon, which means that you can cut just by using GaN 50% of your conduction losses of the path. So would that help me with reducing the size of the heat sinks and the fan and some of the cooling I have in my design. Yes, absolutely. So as you can see in the slide here, on the left-hand side, you have a silicon-based design that has a lot of heat sinking. Well, if you compare it to the design on the right-hand side, which is a GaN-based system, you have only one very tiny heat sink. This shows that your losses are a lot reduced, so your thermal power management can go down. And actually, I do have one of those boards, and it looks very impressive. It's really tiny. Yeah, absolutely. So what else is key? So the second very nice characteristic of GaN is that your parasitic capacitances go down. So for instance, the gate capacitance is about a third of what you would have in a similar MOSFET. And output capacitance associated with a Coss, it's about a fifth. So to put these in terminology that we can relate to. In terms of turn on time switching losses, how can we-- can you translate those for us? Yes, absolutely. So because of the smaller gate capacitance or gate charge, you can switch-- you can turn on the GaN a lot faster. So this allows you to have very high slew rates. And the instance in the slide that I'm showing here, you can have up or beyond 100 volts per nanoseconds. Well, this is a lot higher than you could ever achieve in silicon. And this, in combination with the loss savings that you get from the lower Coss-- It's about 80%-- enables you very high frequency design, and also a higher efficiency at the same time. So in terms of comparing that efficiency to existing designs using silicon MOSFET, can you quantify how much improvement we can expect? Yes, absolutely. So here I have another example. As you can see in this slide, this is actually taken on the same system, and we're comparing the efficiency curve of the system done with a silicon MOSFET, and then we do the same experiment with GaN. And as you can see, the efficiency curve is like 15% higher. 15%. 15%. So you can get a nice increase. That's huge. Absolutely. And this is a higher frequency design. So I notice the data was taken at 1 megahertz. Is that what you would characterize a high frequency when you talked about high frequency before? So 1 megahertz is just, actually, a starting point. A starting point. OK. It's really-- our designs can run a lot higher. So this particular example that I was showing you before, it's done with our medium voltage part, LMG5200, which is an 80-volt part. And this can run actually higher than 5 megahertz. Higher than 5 megahertz. Above and beyond that frequency. OK. And on top of that, we also have a high voltage 600-volt part, LMG3410, that can run up to 1 megahertz. So this is a high voltage part that can run up to a megahertz, which is really fast. 1 megahertz has 600 volts. Yes. That's impressive. So when you get those frequencies, the advantage is that you can start shrinking your design, because all your passive components can go down in size, literally, as you go up with frequency. Right. So let's maybe get more real about the size reduction. So how much reduction do you expect to get from a GaN-based design? So I have a good example here. As you can see in this slide-- Again, I'm doing like a silicon versus GaN example-- on the left-hand side, you have a silicon-based solution. And you can actually go from there to the one on the right-hand side and you get about a 75% reduction in size. So the GaN solution is about a quarter of the size. A quarter. Correct. So you can shrink it a lot. But GaN, we're not taking only the advantage to do this type of solution of the just basic properties of GaN, but we're also using GaN to open up new topologies that help simplify the design. Power conversion topologies. Correct. So we can get these new topologies to simplify your design. So you get simpler design. You can compact them. And you can also get higher efficiencies. Now, I think your comment about enabling new topologies is really important, because a lot of times, the major benefit of GaN shows up when you do use new topologies that you were not able to do with MOSFET, and not just by strictly replacing-- swapping devices from MOSFET to GaN. Yes, GaN is a new topology enabler, absolutely. That's a great way to summarize it. What is your third point? So the third point is that GaN has actually a zero reverse recovery. It's a majority carrier device, so if you look at an application that can take advantage of this, it's any hard switch converter that runs in continuous conduction mode. So typically, you have the synchronous rectifier has to run into the third quadrant or has a body diode conducting. And when you stop that conduction, you typically reverse it, and you have to recover the p-n junction that is present there. So MOSFETS have this structure, and there is a loss associated with them, that it's linear with frequency. As you can see in the graph here, the silicon losses are shown in red. They go up, literally, with frequency. And if you look at the thermal of it, silicon reaches its maximum frequency at around 1.5 megahertz. And there would be a stretch to run it at that frequency. A maximum freque-- is there like a physical limitation of silicon? It's more of a thermal limitation. Once you get to that frequency, your silicon would start getting too hot to run any power through it. Not practical anymore for any design. While GaN, because it does not have this loss mechanism, you can see that it's actually a flat line on the bottom. So it's completely independent of frequency, and it keeps itself at zero. So I know you said zero. Is it near zero or is it zero? It's absolutely zero. A majority carrier does not have recovery losses. Well, I'm excited. This is very exciting technology. Let's talk about designing with GaN. And the first thing that comes to mind is driving a GaN gate. Talk about some of the challenges, some of the things you need to think about as you work with GaN. So absolutely. GaN is actually a very fast material. Like you can switch GaN very, very fast as I was showing you just before. 5 megahertz and more, right? Exactly. And slew rates higher than 100 volts per nanosecond. So to get the best switching performance, we have to make sure that everything is under control. So you want to make sure that you're looping inductances. Both the gate looping inductance and your power loop inductance are minimized. This is both because you can create ringing that would stress the part. But those ringing also end up being extra losses in the system, and they can also give you a problem with VMI radiation. So you want to have those optimized and matched with the driver strength. And with discrete GaN, it could be challenging. So TI tries to offer a solution or tries to overcome this challenge by co-packaging the driver and GaN in a single IC. So let's talk a bit more about the single package approach. How does it-- can you talk more about it? How does it help in the design? How is it an advantage from a-- if I'm designing with GaN, how does it help me? Well, it makes your design easier. So it eliminates some components, so you don't have external components. You have only one part that you have to place, and this comes in a nice robust QFN package. And once we have everything in one package, we actually take care of minimizing all the inductances around the system. And that helps also by modifying the gate-- the driver strength to have an optimal response of the GaN. That sounds pretty exciting. Thank you so much, Alberto. I'm very excited. And I think kind of summarizing what I heard from you, from a GaN technology perspective comparing that to silicon, there are some key benefits that we can talk about making designs cooler. We talked about reducing power losses by as much as 75%, 80%, making it faster, run at much higher frequencies, 5 megahertz and more, like you said before. And also, reducing the physical size of the design. That's power density. Absolutely. And getting down what was a quarter of design, a quarter of size. Yeah. [INAUDIBLE] you put it. That's a very nice example. It's a very neat circuit we have there. Absolutely. And I think the last point, also to me sounds very, very important, is to really-- how to make that design, how to make that transition from MOSFET to GaN easier. And that's where the single package idea and the push comes in with integration of the GaN FET, the driver, some of the protection features, all of that in a nice QFN package to use. So Alberto, where do we go for more information on GaN? So we actually have a GaN page, which is very easy to remember. It's ti.com/gan. So once you get there, what you can find is more information about GaN. There's some white paper talking about the material and applications. There is some reference designs. But you can also purchase some evaluation modules to do some testing yourself. Samples, maybe? And samples, as well, of course. Well, thank you, Alberto. Thank you. And that's it for now. Thank you for watching, and please don't forget to go to ti.com/gan. So Alberto, I think GaN is really an exciting tech--